US PATENT SUBCLASS 438 / 197
.~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.)

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197.~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
198  DF  .~.~> Specified crystallographic orientation
199  DF  .~.~> Complementary insulated gate field effect transistors (i.e., CMOS) {11}
234  DF  .~.~> Including bipolar transistor (i.e., BiMOS) {2}
237  DF  .~.~> Including diode
238  DF  .~.~> Including passive device (e.g., resistor, capacitor, etc.) {1}
257  DF  .~.~> Having additional gate electrode surrounded by dielectric (i.e., floating gate) {8}
268  DF  .~.~> Vertical channel {3}
275  DF  .~.~> Making plural insulated gate field effect transistors of differing electrical characteristics {1}
279  DF  .~.~> Making plural insulated gate field effect transistors having common active region
280  DF  .~.~> Having underpass or crossunder
281  DF  .~.~> Having fuse or integral short
282  DF  .~.~> Buried channel
283  DF  .~.~> Plural gate electrodes (e.g., dual gate, etc.)
284  DF  .~.~> Closed or loop gate
285  DF  .~.~> Utilizing compound semiconductor
286  DF  .~.~> Asymmetric
287  DF  .~.~> Gate insulator structure constructed of diverse dielectrics (e.g., MNOS, etc.) or of nonsilicon compound
288  DF  .~.~> Having step of storing electrical charge in gate dielectric
289  DF  .~.~> Doping of semiconductive channel region beneath gate insulator (e.g., adjusting threshold voltage, etc.) {2}
292  DF  .~.~> Direct application of electrical current
293  DF  .~.~> Fusion or solidification of semiconductor region
294  DF  .~.~> Including isolation structure {3}
299  DF  .~.~> Self-aligned {2}
308  DF  .~.~> Radiation or energy treatment modifying properties of semiconductor regions of substrate (e.g., thermal, corpuscular, electromagnetic, etc.)

DEFINITION

Classification: 438/197

Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.):

(under subclass 142) Process for making a field effect transistor wherein the gate electrode is electrically insulated from the semiconductive substrate, that portion of the semiconductive substrate therebeneath being the active channel region separating source and drain.

SEE OR SEARCH THIS CLASS, SUBCLASS:

151, for a process of making an insulated gate field effect transistor on an insulating substrate or layer

585, for insulated gate metallization processes, per se.