US PATENT SUBCLASS 438 / 234
.~.~ Including bipolar transistor (i.e., BiMOS)


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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
234.~.~ Including bipolar transistor (i.e., BiMOS) {2}
235  DF  .~.~.~> Heterojunction bipolar transistor
236  DF  .~.~.~> Lateral bipolar transistor


DEFINITION

Classification: 438/234

Including bipolar transistor (i.e., BiMOS):

(under subclass 197) Process for making an insulated gate field effect transistor having combined therewith a bipolar transistor.