US PATENT SUBCLASS 438 / 299
.~.~ Self-aligned

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
299.~.~ Self-aligned {2}
300  DF  .~.~.~> Having elevated source or drain (e.g., epitaxially formed source or drain, etc.)
301  DF  .~.~.~> Source or drain doping {3}

DEFINITION

Classification: 438/299

Self-aligned:

(under subclass 197) Process for making an insulated gate field effect transistor wherein a previously formed device feature is utilized to make device regions in the desired registration to the previously formed feature.

(1) Note. A self-aligned gate is one which is aligned between the source and drain via a masking process which uses the gate material itself to achieve the registration of the related device regions.