US PATENT SUBCLASS 438 / 151
.~.~ Having insulated gate


Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
149  DF  .~ On insulating substrate or layer (e.g., TFT, etc.) {2}
151.~.~ Having insulated gate {11}
152  DF  .~.~.~> Combined with electrical device not on insulating substrate or layer {1}
154  DF  .~.~.~> Complementary field effect transistors
155  DF  .~.~.~> And additional electrical device on insulating substrate or layer
156  DF  .~.~.~> Vertical channel
157  DF  .~.~.~> Plural gate electrodes (e.g., dual gate, etc.)
158  DF  .~.~.~> Inverted transistor structure {2}
161  DF  .~.~.~> Including source or drain electrode formation prior to semiconductor layer formation (i.e., staggered electrodes)
162  DF  .~.~.~> Introduction of nondopant into semiconductor layer
163  DF  .~.~.~> Adjusting channel dimension (e.g., providing lightly doped source or drain region, etc.)
164  DF  .~.~.~> Semiconductor islands formed upon insulating substrate or layer (e.g., mesa formation, etc.) {1}
166  DF  .~.~.~> Including recrystallization step


DEFINITION

Classification: 438/151

Having insulated gate:

(under subclass 149) Process for making an insulated gate field effect transistor from a semiconductive layer formed upon an insulating substrate (for example, glass or sapphire) or an insulating layer.