US PATENT SUBCLASS 257 / 368
.~.~ Insulated gate field effect transistor in integrated circuit


Current as of: June, 1999
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257 /   HD   ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)

213  DF  FIELD EFFECT DEVICE {6}
288  DF  .~ Having insulated electrode (e.g., MOSFET, MOS diode) {17}
368.~.~ Insulated gate field effect transistor in integrated circuit {10}
369  DF  .~.~.~> Complementary insulated gate field effect transistors {5}
378  DF  .~.~.~> Combined with bipolar transistor
379  DF  .~.~.~> Combined with passive components (e.g., resistors) {2}
382  DF  .~.~.~> With contact to source or drain region of refractory material (e.g., polysilicon, tungsten, or silicide) {3}
386  DF  .~.~.~> With means to reduce parasitic capacitance {2}
390  DF  .~.~.~> Matrix or array of field effect transistors (e.g., array of FETs only some of which are completed, or structure for mask programmed read-only memory (ROM)) {1}
392  DF  .~.~.~> Insulated gate field effect transistors of different threshold voltages in same integrated circuit (e.g., enhancement and depletion mode)
393  DF  .~.~.~> Insulated gate field effect transistor adapted to function as load element for switching insulated gate field effect transistor
394  DF  .~.~.~> With means to prevent parasitic conduction channels {2}
401  DF  .~.~.~> With specified physical layout (e.g., ring gate, source/drain regions shared between plural FETs, plural sections connected in parallel to form power MOSFET)


DEFINITION

Classification: 257/368

Insulated gate field effect transistor in integrated circuit:

(under subclass 288) Subject matter wherein the device is an insulated gate field effect transistor located in a single monolithic semiconductor chip circuit.