US PATENT SUBCLASS 257 / 401
.~.~.~ With specified physical layout (e.g., ring gate, source/drain regions shared between plural FETs, plural sections connected in parallel to form power MOSFET)

Current as of: June, 1999
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257 /   HD   ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)

213  DF  FIELD EFFECT DEVICE {6}
288  DF  .~ Having insulated electrode (e.g., MOSFET, MOS diode) {17}
368  DF  .~.~ Insulated gate field effect transistor in integrated circuit {10}
401.~.~.~ With specified physical layout (e.g., ring gate, source/drain regions shared between plural FETs, plural sections connected in parallel to form power MOSFET)

DEFINITION

Classification: 257/401

With specified physical layout (e.g., ring gate, source/drain regions shared between plural FETs, plural sections connected in parallel to form power MOSFET):

(under subclass 368) Subject matter wherein the device has a specific physical configuration or layout (e.g., ring gate).