US PATENT SUBCLASS 257 / 386
.~.~.~ With means to reduce parasitic capacitance

Current as of: June, 1999
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257 /   HD   ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)

213  DF  FIELD EFFECT DEVICE {6}
288  DF  .~ Having insulated electrode (e.g., MOSFET, MOS diode) {17}
368  DF  .~.~ Insulated gate field effect transistor in integrated circuit {10}
386.~.~.~ With means to reduce parasitic capacitance {2}
387  DF  .~.~.~.~> Gate electrode overlaps at least one of source or drain by no more than depth of source or drain (e.g., self-aligned gate) {1}
389  DF  .~.~.~.~> With thick insulator over source or drain region

DEFINITION

Classification: 257/386

With means to reduce parasitic capacitance:

(under subclass 368) Subject matter wherein the device contains means to reduce unwanted capacitance between elements of the field effect transistor.