 Electronic File Wrappers |  Electronic Patent Documents |  Paper Patent Documents | Current as of: June, 1999
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| DF | CLASS NOTES | |
| 1 | DF | ADDRESSING COMBINED WITH SPECIFIC MEMORY CONFIGURATION OR SYSTEM |
| 2 | DF | .~ Addressing extended or expanded memory |
| 3 | DF | .~ Addressing cache memories |
| 4 | DF | .~ Dynamic-type storage device (e.g., disk, tape, drum) |
| 5 | DF | .~ For multiple memory modules (e.g., banks, interleaved memory) |
| 6 | DD | .~ Virtual machine memory addressing |
| 100 | DF | STORAGE ACCESSING AND CONTROL |
| 101 | DF | .~ Specific memory composition |
| 102 | DF | .~.~ Solid-state read only memory (ROM) |
| 103 | DF | .~.~.~ Programmable read only memory (PROM, EEPROM, etc.) |
| 104 | DF | .~.~ Solid-state random access memory (RAM) |
| 105 | DF | .~.~.~ Dynamic random access memory |
| 106 | DF | .~.~.~.~ Refresh scheduling |
| 107 | DF | .~.~ Ferrite core |
| 108 | DF | .~.~ Content addressable memory (CAM) |
| 109 | DF | .~.~ Shift register memory |
| 110 | DF | .~.~.~ Circulating memory |
| 111 | DF | .~.~ Accessing dynamic storage device |
| 112 | DF | .~.~.~ Direct access storage device (DASD) |
| 113 | DF | .~.~.~.~ Caching |
| 114 | DF | .~.~.~.~ Arrayed (e.g., RAIDs) |
| 115 | DF | .~.~ Detachable memory |
| 116 | DF | .~.~ Bubble memory |
| 117 | DF | .~ Hierarchical memories |
| 118 | DF | .~.~ Caching |
| 119 | DF | .~.~.~ Multiple caches |
| 120 | DF | .~.~.~.~ Parallel caches |
| 121 | DF | .~.~.~.~ Private caches |
| 122 | DF | .~.~.~.~ Hierarchical caches |
| 123 | DF | .~.~.~.~ User data cache and instruction data cache |
| 124 | DF | .~.~.~.~ Cross-interrogating |
| 125 | DF | .~.~.~ Instruction data cache |
| 126 | DF | .~.~.~ User data cache |
| 127 | DF | .~.~.~ Interleaved |
| 128 | DF | .~.~.~ Associative |
| 129 | DF | .~.~.~ Partitioned cache |
| 130 | DF | .~.~.~ Shared cache |
| 131 | DF | .~.~.~ Multiport cache |
| 132 | DF | .~.~.~ Stack cache |
| 133 | DF | .~.~.~ Entry replacement strategy |
| 134 | DF | .~.~.~.~ Combined replacement modes |
| 135 | DF | .~.~.~.~ Cache flushing |
| 136 | DF | .~.~.~.~ Least recently used |
| 137 | DF | .~.~.~ Look-ahead |
| 138 | DF | .~.~.~ Cache bypassing |
| 139 | DF | .~.~.~.~ No-cache flags |
| 140 | DF | .~.~.~ Cache pipelining |
| 141 | DF | .~.~.~ Coherency |
| 142 | DF | .~.~.~.~ Write-through |
| 143 | DF | .~.~.~.~ Write-back |
| 144 | DF | .~.~.~.~ Cache status data bit |
| 145 | DF | .~.~.~.~ Access control bit |
| 146 | DF | .~.~.~.~ Snooping |
| 147 | DF | .~ Shared memory area |
| 148 | DF | .~.~ Plural shared memories |
| 149 | DF | .~.~ Multiport memory |
| 150 | DF | .~.~ Simultaneous access regulation |
| 151 | DF | .~.~ Prioritized access regulation |
| 152 | DF | .~.~ Memory access blocking |
| 153 | DF | .~.~ Shared memory partitioning |
| 154 | DF | .~ Control technique |
| 155 | DF | .~.~ Read-modify-write (RMW) |
| 156 | DF | .~.~ Status storage |
| 157 | DF | .~.~ Interleaving |
| 158 | DF | .~.~ Prioritizing |
| 159 | DF | .~.~ Entry replacement strategy |
| 160 | DF | .~.~.~ Least recently used (LRU) |
| 161 | DF | .~.~ Archiving |
| 162 | DF | .~.~.~ Backup |
| 163 | DF | .~.~ Access limiting |
| 164 | DF | .~.~.~ With password or key |
| 165 | DF | .~.~ Internal relocation |
| 166 | DF | .~.~ Resetting |
| 167 | DF | .~ Access timing |
| 168 | DF | .~.~ Concurrent accessing |
| 169 | DF | .~.~ Memory access pipelining |
| 170 | DF | .~ Memory configuring |
| 171 | DF | .~.~ Based on data size |
| 172 | DF | .~.~ Based on component size |
| 173 | DF | .~.~ Memory partitioning |
| 200 | DF | ADDRESS FORMATION |
| 201 | DF | .~ Slip control, misaligning, boundary alignment |
| 202 | DF | .~ Address mapping (e.g., conversion, translation) |
| 203 | DF | .~.~ Virtual addressing |
| 204 | DF | .~.~.~ Predicting, look-ahead |
| 205 | DF | .~.~.~.~ Directories and tables (e.g., DLAT, TLB) |
| 206 | DF | .~.~.~ Translation tables (e.g., segment and page table or map) |
| 207 | DF | .~.~.~.~ Directory tables (e.g., DLAT, TLB) |
| 208 | DF | .~.~.~.~ Segment or page table descriptor |
| 209 | DF | .~.~.~ Including plural logical address spaces, pages, segments, blocks |
| 210 | DF | .~.~ Resolving conflict, coherency, or synonym problem |
| 211 | DF | .~ Address multiplexing or address bus manipulation |
| 212 | DF | .~ Varying address bit-length or size |
| 213 | DF | .~ Generating prefetch, look-ahead, jump, or predictive address |
| 214 | DF | .~ Operand address generation |
| 215 | DF | .~ In response to microinstruction |
| 216 | DF | .~ Hashing |
| 217 | DF | .~ Generating a particular pattern/sequence of addresses |
| 218 | DF | .~.~ Sequential addresses generation |
| 219 | DF | .~ Incrementing, decrementing, or shifting circuitry |
| 220 | DF | .~ Combining two or more values to create address |
| 221 | DF | .~ Using table |