US PATENT SUBCLASS 711 / 147
.~ Shared memory area

Current as of: June, 1999
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711 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: MEMORY

100  DF  STORAGE ACCESSING AND CONTROL {6}
147.~ Shared memory area {6}
148  DF  .~.~> Plural shared memories
149  DF  .~.~> Multiport memory
150  DF  .~.~> Simultaneous access regulation
151  DF  .~.~> Prioritized access regulation
152  DF  .~.~> Memory access blocking
153  DF  .~.~> Shared memory partitioning

DEFINITION

Classification: 711/147

Shared memory area:

(under subclass 100) Subject matter wherein at least a portion of the memory being accessed or controlled is

solid-state memory that iscommon to a plurality of users (e.g., a CPU and a DMA controller, multiple CPUs, etc.) or a plurality of tasks (e.g., in a multitasking system) or both.

SEE OR SEARCH CLASS

395, Information Processing System Organization,

200.43, for a plurality of computers transferring data through one or more memories accessible by the plurality of computers; subclass 496 for memory access pipelining; and subclasses 672+ for process scheduling involving balancing the work load or resources, memory use, register use, resource availability, time constraints, semaphores, and mutual exclusion mechanisms used for programs or process synchronization.

707, Data Processing: Database and File Management, Data Structures, or Document Processing,

1+, 100+, and 200+ for database access, schema, and maintenance.