US PATENT SUBCLASS 711 / 209
.~.~.~ Including plural logical address spaces, pages, segments, blocks

Current as of: June, 1999
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711 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: MEMORY

200  DF  ADDRESS FORMATION {12}
202  DF  .~ Address mapping (e.g., conversion, translation) {2}
203  DF  .~.~ Virtual addressing {3}
209.~.~.~ Including plural logical address spaces, pages, segments, blocks

DEFINITION

Classification: 711/209

Including plural logical address spaces, pages, segments, blocks:

(under subclass 203) Subject matter wherein portions of memory are organized or managed in accordance with a predetermined mapping scheme.

(1) Note. This subclass includes art directed to addressing variable-sized pages, segments, and blocks.