US PATENT SUBCLASS 711 / 217
.~ Generating a particular pattern/sequence of addresses
Current as of:
June, 1999
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ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: MEMORY
200
DF
ADDRESS FORMATION
{12}
217
.~ Generating a particular pattern/sequence of addresses {1}
218
DF
.~.~
> Sequential addresses generation
DEFINITION
Classification: 711/217
Generating a particular pattern/sequence of addresses:
(under subclass 200) Subject matter wherein values specifying memory locations are determined according to a predetermined algorithm.
SEE OR SEARCH CLASS
365, Static Information Storage and Retrieval,
230.03, and 230.04 for subject matter including plural banks or blocks and alternating between them.
714, Error Detection/Correction and Fault Detection/Recovery,
718, 720 for testing memories utilizing patterns of addresses and data.
