US PATENT SUBCLASS 711 / 5
.~ For multiple memory modules (e.g., banks, interleaved memory)

Current as of: June, 1999
Click HD for Main Headings
Click for All Classes

Internet Version by PATENTEC © 1999      Terms of Use


711 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: MEMORY

1  DF  ADDRESSING COMBINED WITH SPECIFIC MEMORY CONFIGURATION OR SYSTEM {5}
5.~ For multiple memory modules (e.g., banks, interleaved memory)

DEFINITION

Classification: 711/5

For multiple memory modules (e.g., banks, interleaved memory):

(under subclass 1) Subject matter wherein logical addresses are determined and mapped (e.g., interleaving) across different physical memory arranged in blocks, banks, partitions, etc.

(1) Note. This subclass includes subject matter directed to static column or static row handling in multiple physical memory module addressing.

SEE OR SEARCH THIS CLASS, SUBCLASS:

127, for interleaved cache.

SEE OR SEARCH CLASS

365, Static Information Storage and Retrieval,

230.03, and 230.04 for subject matter including plural banks or blocks and alternating between them.