US PATENT SUBCLASS 438 / 202
.~.~.~.~ Including bipolar transistor (i.e., BiCMOS)


Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
199  DF  .~.~ Complementary insulated gate field effect transistors (i.e., CMOS) {11}
200  DF  .~.~.~ And additional electrical device {4}
202.~.~.~.~ Including bipolar transistor (i.e., BiCMOS) {5}
203  DF  .~.~.~.~.~> Complementary bipolar transistors
204  DF  .~.~.~.~.~> Lateral bipolar transistor
205  DF  .~.~.~.~.~> Plural bipolar transistors of differing electrical characteristics
206  DF  .~.~.~.~.~> Vertical channel insulated gate field effect transistor
207  DF  .~.~.~.~.~> Including isolation structure {1}


DEFINITION

Classification: 438/202

Including bipolar transistor (i.e., BiCMOS):

(under subclass 200) Process for making complementary insulated gate field effect transistors combined with a bipolar transistor.