US PATENT SUBCLASS 438 / 200
.~.~.~ And additional electrical device


Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
199  DF  .~.~ Complementary insulated gate field effect transistors (i.e., CMOS) {11}
200.~.~.~ And additional electrical device {4}
201  DF  .~.~.~.~> Including insulated gate field effect transistor having gate surrounded by dielectric (i.e., floating gate)
202  DF  .~.~.~.~> Including bipolar transistor (i.e., BiCMOS) {5}
209  DF  .~.~.~.~> Including additional vertical channel insulated gate field effect transistor
210  DF  .~.~.~.~> Including passive device (e.g., resistor, capacitor, etc.)


DEFINITION

Classification: 438/200

And additional electrical device:

(under subclass 199) Process for making complementary insulated gate field effect transistors having combined therewith an additional electrical device.