US PATENT SUBCLASS 438 / 206
.~.~.~.~.~ Vertical channel insulated gate field effect transistor

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
199  DF  .~.~ Complementary insulated gate field effect transistors (i.e., CMOS) {11}
200  DF  .~.~.~ And additional electrical device {4}
202  DF  .~.~.~.~ Including bipolar transistor (i.e., BiCMOS) {5}
206.~.~.~.~.~ Vertical channel insulated gate field effect transistor

DEFINITION

Classification: 438/206

Vertical channel insulated gate field effect transistor:

(under subclass 202) Process for making complementary insulated gate field effect transistors combined with a bipolar transistor and wherein at least one insulated gate field effect transistor possesses an active channel region which is configured to provide, at least in part, a vertically conductive pathway between source and drain regions.