US PATENT SUBCLASS 438 / 253
.~.~.~.~ Stacked capacitor

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
238  DF  .~.~ Including passive device (e.g., resistor, capacitor, etc.) {1}
239  DF  .~.~.~ Capacitor {5}
253.~.~.~.~ Stacked capacitor {3}
254  DF  .~.~.~.~.~> Including selectively removing material to undercut and expose storage node layer
255  DF  .~.~.~.~.~> Including texturizing storage node layer
256  DF  .~.~.~.~.~> Contacts formed by selective growth or deposition

DEFINITION

Classification: 438/253

Stacked capacitor:

(under subclass 239) Process for making an insulated gate field effect transistor in combination with a capacitor containing a number of capacitor plate and dielectric layers deposited successively one atop another and overlying the field effect transistor.

SEE OR SEARCH CLASS

257, Active Solid-State Devices (e.g., Transistors, Solid-State Diodes),

306+, for an insulated gate field effect transistor combined with a stacked capacitor.