US PATENT SUBCLASS 714 / 724
DIGITAL LOGIC TESTING

Current as of: June, 1999
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714 /   HD   ERROR DETECTION/CORRECTION AND FAULT DETECTION/RECOVERY

724DIGITAL LOGIC TESTING {10}
725  DF  .~> Programmable logic array (PLA) testing
726  DF  .~> Scan path testing (e.g., level sensitive scan design (LSSD)) {5}
732  DF  .~> Signature analysis
733  DF  .~> Built-in testing circuit (BILBO)
734  DF  .~> Structural (in-circuit test)
735  DF  .~> Device response compared to input pattern
736  DF  .~> Device response compared to expected fault-free response
737  DF  .~> Device response compared to fault dictionary/truth table
738  DF  .~> Including test pattern generator {6}
745  DF  .~> Determination of marginal operation limits

DEFINITION

Classification: 714/724

DIGITAL LOGIC TESTING:

(under the class definition) Subject matter in which the diagnostic test is performed upon a system or element performing a binary logic operation upon a signal having plural distinct discrete states.

(1) Note. Testing or measuring of electrical properties are classified elsewhere unless the testing device includes analysis of the information content of a digital signal. Control signals are not data signals.

SEE OR SEARCH CLASS

324, Electricity: Measuring and Testing, appropriate subclass, particularly

73, for measuring and testing of electrical device parameters under controlled conditions.

326, Electronic Digital Logic Circuitry,

16, for electronic digital logic circuitry with test facilitating feature and subclasses 21+ for electronic digital logic circuitry maintaining signal integrity.