US PATENT SUBCLASS 438 / FOR 203
.~.~.~.~.~ Gate surrounded by dielectric layer, e.g., floating gate, etc. (437/43)

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

FOR 149  DF  INCLUDING FORMING A SEMICONDUCTOR JUNCTION (437/15) {7}
FOR 150  DF  .~ Using energy beam to introduce dopant or modify dopant distribution (437/ 16) {5}
FOR 155  DF  .~.~ Of semiconductor on insulating substrate (437/21) {14}
FOR 173  DF  .~.~.~ Involving Schottky contact formation (437/39) {12}
FOR 202  DF  .~.~.~.~ Gate structure constructed of diverse dielectrics (437/42) {20}
FOR 203.~.~.~.~.~ Gate surrounded by dielectric layer, e.g., floating gate, etc. (437/43)

DEFINITION

Classification: 438/FOR.203

Gate surrounded by dielectric layer, e.g., floating gate, etc.:

Foreign art collection for processes wherein the gate structure is submerged in dielectric material.