US PATENT SUBCLASS 438 / FOR 167
.~.~.~.~.~ Having dielectric isolation (437/33)

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

FOR 149  DF  INCLUDING FORMING A SEMICONDUCTOR JUNCTION (437/15) {7}
FOR 150  DF  .~ Using energy beam to introduce dopant or modify dopant distribution (437/ 16) {5}
FOR 155  DF  .~.~ Of semiconductor on insulating substrate (437/21) {14}
FOR 161  DF  .~.~.~ Including multiple implantations of same region (437/27) {4}
FOR 165  DF  .~.~.~.~ Forming bipolar transistor (NPN/PNP) (437/31) {2}
FOR 167.~.~.~.~.~ Having dielectric isolation (437/33)

DEFINITION

Classification: 438/FOR.167

Having dielectric isolation:

Foreign art collection for processes involving the incorporation of an insulating regions, e.g., air-gap, recessed oxide, etc., to separate adjacent areas.