US PATENT SUBCLASS 438 / 244
.~.~.~.~.~ Utilizing stacked capacitor structure (e.g., stacked trench, buried stacked capacitor, etc.)

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
238  DF  .~.~ Including passive device (e.g., resistor, capacitor, etc.) {1}
239  DF  .~.~.~ Capacitor {5}
243  DF  .~.~.~.~ Trench capacitor {3}
244.~.~.~.~.~ Utilizing stacked capacitor structure (e.g., stacked trench, buried stacked capacitor, etc.)

DEFINITION

Classification: 438/244

Utilizing stacked capacitor structure (e.g., stacked trench, buried stacked capacitor, etc.):

(under subclass 243) Process wherein the trench capacitor contains a number of capacitor plate regions aligned vertically above each other or wherein the capacitor and the insulated gate field effect transistor are located such that one overlies the other.