US PATENT SUBCLASS 438 / 222
.~.~.~.~.~ With epitaxial semiconductor layer formation

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
199  DF  .~.~ Complementary insulated gate field effect transistors (i.e., CMOS) {11}
218  DF  .~.~.~ Including isolation structure {4}
221  DF  .~.~.~.~ Dielectric isolation formed by grooving and refilling with dielectric material {2}
222.~.~.~.~.~ With epitaxial semiconductor layer formation

DEFINITION

Classification: 438/222

With epitaxial semiconductor layer formation:

(under subclass 221) Process for making complementary insulated gate field effect transistors with dielectric isolation formed by grooving and refilling with dielectric material including a step of forming an epitaxial semiconductor layer.