US PATENT SUBCLASS 438 / 221
.~.~.~.~ Dielectric isolation formed by grooving and refilling with dielectric material

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
199  DF  .~.~ Complementary insulated gate field effect transistors (i.e., CMOS) {11}
218  DF  .~.~.~ Including isolation structure {4}
221.~.~.~.~ Dielectric isolation formed by grooving and refilling with dielectric material {2}
222  DF  .~.~.~.~.~> With epitaxial semiconductor layer formation
223  DF  .~.~.~.~.~> Having well structure of opposite conductivity type {1}

DEFINITION

Classification: 438/221

Dielectric isolation formed by grooving and refilling with dielectric material:

(under subclass 218) Process for making complementary insulated gate field effect transistors wherein lateral isolation means is provided by forming a recess into the semiconductor substrate and refilling the recess at least in part with electrically insulative material.