US PATENT SUBCLASS 257 / 499
INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICALLY ISOLATED COMPONENTS

Current as of: June, 1999
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257 /   HD   ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)

499INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICALLY ISOLATED COMPONENTS {9}
500  DF  .~> Including high voltage or high power devices isolated from low voltage or low power devices in the same integrated circuit {2}
503  DF  .~> With contact or metallization configuration to reduce parasitic coupling (e.g., separate ground pads for different parts of integrated circuit)
504  DF  .~> Including means for establishing a depletion region throughout a semi- conductor layer for isolating devices in different portions of the layer (e.g., "JFET" isolation)
505  DF  .~> With polycrystalline semiconductor isolation region in direct contact with single crystal active semiconductor material
506  DF  .~> Including dielectric isolation means {7}
528  DF  .~> Passive components in ICs {4}
544  DF  .~> With pn junction isolation {8}
557  DF  .~> Lateral bipolar transistor structure {3}
563  DF  .~> With multiple separately connected emitter, collector, or base regions in same transistor structure {1}

DEFINITION

Classification: 257/499

INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICALLY ISOLATED COMPONENTS:

(under the class definition) Subject matter wherein at least one active solid-state device is provided in a single, monolithic semiconductor chip along with other active or passive elements in the chip, and means are provided to electrically isolate different devices in the monolithic chip from each other.

SEE OR SEARCH THIS CLASS, SUBCLASS:

7, for intervalley transfer bulk effect devices (e.g., Gunn effect devices) in a monolithic integrated circuit.

93, for plural light emitting devices with electrical isolation means in integrated circuit structure.

265, for JFET devices having vertical current path in integrated circuit.

272, through 278, for JFET devices in integrated circuits.

334, for short channel IGFET devices having a gate electrode controlling the vertical portion of the channel and being in a groove in an integrated circuit.

337, and 338, for graded channel short channel IGFET devices in integrated circuit structure. 357, through 359, for insulated electrode field effect devices with gate insulator overvoltage protection means in complementary field effect transistor integrated circuit

devices.

368, through 401, for IGFET devices in integrated circuit.

427, for a magnetic field sensor in an integrated circuit.

446, for matrix or array type photodetectors with specific isolation means in an integrated circuit.

491, and 492, for devices with means to increase breakdown voltage in an integrated circuit, including, for example, RESURF devices.

663, for a superconductive contact or lead on an integrated circuit.

713, for cooling means for an integrated circuit device.

758, through 760, for multi-level metallization in, e.g., an integrated circuit device.

922, for a device with means to prevent inspection of or tampering with an integrated circuit.

929, for pn junction isolated integrated circuits with isolation walls having minimum dopant concentration at intermediate depth in epitaxial layer.

SEE OR SEARCH CLASS 438, Semiconductor Device Manufacturing: Process, particularly

294+, for methods of making laterally spaced, electrically isolated semiconductor regions in combination with insulated gate field effect transistors; subclasses 353+ for methods of making laterally spaced, electrically isolated semiconductor regions in combination with bipolar transistors; and subclasses 400+ for methods of making laterally spaced, electrically isolated semiconductor regions or various