US PATENT SUBCLASS 257 / 376
.~.~.~.~.~ With barrier region of reduced minority carrier lifetime (e.g., heavily doped P+ region to reduce electron minority carrier lifetime, or containing deep level impurity or crystal damage), or with region of high threshold voltage (e.g., heavily doped channel stop region)

Current as of: June, 1999
Click HD for Main Headings
Click for All Classes

Internet Version by PATENTEC © 1999      Terms of Use


257 /   HD   ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)

213  DF  FIELD EFFECT DEVICE {6}
288  DF  .~ Having insulated electrode (e.g., MOSFET, MOS diode) {17}
368  DF  .~.~ Insulated gate field effect transistor in integrated circuit {10}
369  DF  .~.~.~ Complementary insulated gate field effect transistors {5}
373  DF  .~.~.~.~ With pn junction to collect injected minority carriers to prevent parasitic bipolar transistor action {3}
376.~.~.~.~.~ With barrier region of reduced minority carrier lifetime (e.g., heavily doped P+ region to reduce electron minority carrier lifetime, or containing deep level impurity or crystal damage), or with region of high threshold voltage (e.g., heavily doped channel stop region)

DEFINITION

Classification: 257/376

With barrier region of reduced minority carrier lifetime (e.g., heavily doped P+ region to reduce electron minority carrier lifetime, or containing deep level impurity or crystal damage), or with region of high threshold voltage (e.g., heavily doped channel stop region):

(under subclass 372) Subject matter wherein the means to prevent latchup includes an electrical barrier region whose minority carrier lifetime is reduced from its normal value (e.g., by employing heavily doped P+ region to reduce electron minority carrier lifetime, or contains a deep level impurity or crystal damage) or has a region of high threshold voltage (e.g., a heavily doped channel stop region).