US PATENT SUBCLASS 438 / 220
.~.~.~.~ Isolation by PN junction only


Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
199  DF  .~.~ Complementary insulated gate field effect transistors (i.e., CMOS) {11}
218  DF  .~.~.~ Including isolation structure {4}
220.~.~.~.~ Isolation by PN junction only


DEFINITION

Classification: 438/220

Isolation by PN junction only:

(under subclass 218) Process for making complementary insulated gate field effect transistors in which the transistors are electrically isolated solely through the use of properly biased PN junctions.