US PATENT SUBCLASS 257 / 515
.~.~.~.~ With active junction abutting groove (e.g., "walled emitter")

Current as of: June, 1999
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257 /   HD   ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)

499  DF  INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICALLY ISOLATED COMPONENTS {9}
506  DF  .~ Including dielectric isolation means {7}
509  DF  .~.~ Combined with pn junction isolation (e.g., isoplanar, LOCOS) {1}
510  DF  .~.~.~ Dielectric in groove {8}
515.~.~.~.~ With active junction abutting groove (e.g., "walled emitter")

DEFINITION

Classification: 257/515

With active junction abutting groove (e.g., "walled emitter"):

(under subclass 510) Subject matter wherein at least one pn junction forming a part of an active solid-state device terminates against the dielectric filling in the isolation groove.