US PATENT SUBCLASS 257 / 513
.~.~.~.~ Vertical walled groove

Current as of: June, 1999
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257 /   HD   ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)

499  DF  INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICALLY ISOLATED COMPONENTS {9}
506  DF  .~ Including dielectric isolation means {7}
509  DF  .~.~ Combined with pn junction isolation (e.g., isoplanar, LOCOS) {1}
510  DF  .~.~.~ Dielectric in groove {8}
513.~.~.~.~ Vertical walled groove {1}
514  DF  .~.~.~.~.~> With active junction abutting groove (e.g., "walled emitter")

DEFINITION

Classification: 257/513

Vertical walled groove:

(under subclass 510) Subject matter wherein the dielectric isolation is located in grooves in the surface of the overall device which extend perpendicular to the surface of the overall device.