US PATENT SUBCLASS 712 / 16
.~.~ Array processor operation


Current as of: June, 1999
Click HD for Main Headings
Click for All Classes

Internet Version by PATENTEC © 1999      Terms of Use



712 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: PROCESSING ARCHITECTURES AND INSTURCTION PROCESSING (E.G., PROCESSORS)

1  DF  PROCESSING ARCHITECTURE {7}
10  DF  .~ Array processor {2}
16.~.~ Array processor operation {6}
17  DF  .~.~.~> Application specific
18  DF  .~.~.~> Data flow array processor
19  DF  .~.~.~> Systolic array processor
20  DF  .~.~.~> Multimode (e.g., MIMD to SIMD, etc.)
21  DF  .~.~.~> Multiple instruction, multiple data (MIMD)
22  DF  .~.~.~> Single instruction, multiple data (SIMD)


DEFINITION

Classification: 712/16

Array processor operation:

(under subclass 10) Subject matter wherein a specific function or process performed by the array processor is specified.