US PATENT SUBCLASS 438 / 295
.~.~.~ Total dielectric isolation

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
197  DF  .~ Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) {24}
294  DF  .~.~ Including isolation structure {3}
295.~.~.~ Total dielectric isolation

DEFINITION

Classification: 438/295

Total dielectric isolation:

(under subclass 294) Process for making an insulated gate field effect transistor which is fully electrically isolated by dielectric insulative material from laterally adjacent semiconductive regions.