US PATENT SUBCLASS 326 / 70
.~.~.~ TTL to/from MOS


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326 /   HD   ELECTRONIC DIGITAL LOGIC CIRCUITRY

62  DF  INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT, ETC.) {3}
63  DF  .~ Logic level shifting (i.e., interface between devices of different logic families) {3}
68  DF  .~.~ Field-effect transistor (e.g., JFET, MOSFET, etc.) {4}
70.~.~.~ TTL to/from MOS {1}
71  DF  .~.~.~.~> TTL to/from CMOS {1}


DEFINITION

Classification: 326/70

TTL to/from MOS:

(under subclass 68) Subject matter comprising the interfacing

between a transistor-transistor logic device and a metal-oxide semiconductor device.

(1) Note. A transistor-transistor logic device has a forward-biased input transistor which is responsive to an input logic signal at each of its one or more emitters and with its collector being directly coupled to the base of an output transistor. In TTL, the base-collector junction of the input transistor (usually a multiemitter type) remains forward biased and in the saturation region when the circuit is in either the "on" or "off" condition.

(2) Note. A MOS device is a field-effect transistor that has a metallic gate insulated by an oxide layer from the semiconductor channel.