US PATENT SUBCLASS 326 / 39
.~ Array (e.g., PLA, PAL, PLD, etc.)

Current as of: June, 1999
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326 /   HD   ELECTRONIC DIGITAL LOGIC CIRCUITRY

37  DF  MULTIFUNCTIONAL OR PROGRAMMABLE (E.G., UNIVERSAL, ETC.) {6}
39.~ Array (e.g., PLA, PAL, PLD, etc.) {4}
40  DF  .~.~> With flip-flop or sequential device
41  DF  .~.~> Significant integrated structure, layout, or layout interconnections
42  DF  .~.~> Bipolar transistor {1}
44  DF  .~.~> Field effect transistor {1}

DEFINITION

Classification: 326/39

Array (e.g., PLA, PAL, PLD, etc.):

(under subclass 37) Subject matter having a group of many similar logic elements connected in series or in parallel (row or column) to form a matrix of two or three dimensions wherein the interconnection between rows or columns can be selectively connected to perform a logical function.

(1) Note. Programmable logic array (PLA), programmable array logic (PAL), or programmable logic device (PLD) are common terms to indicate devices included in this subclass

which may be, for example, a combination of a programmable AND array and a programmable OR array, or all other possible combinations of logic functions.

SEE OR SEARCH CLASS

340, Communications: Electrical,

825+, for matrix switch with programmable logic circuits.

365, Static Information Storage and Retrieval,

189.08, for read/write circuit including plural elements logic arrangement to handle information signal. 708, Electrical Computers: Arithmetic Processing and Calculating,

230+, for programming logic circuits with computational means (i.e., arithmetical operation).