US PATENT SUBCLASS 712 / 33
.~.~ Having multiple internal buses

Current as of: June, 1999
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712 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: PROCESSING ARCHITECTURES AND INSTURCTION PROCESSING (E.G., PROCESSORS)

1  DF  PROCESSING ARCHITECTURE {7}
32  DF  .~ Microprocessor or multichip or multimodule processor having sequential program control {7}
33.~.~ Having multiple internal buses

DEFINITION

Classification: 712/33

Having multiple internal buses:

(under subclass 32) Subject matter comprising an internal structure having plural buses.