US PATENT SUBCLASS 712 / 244
.~.~ Exeception processing (e.g., interrupts and traps)

Current as of: June, 1999
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712 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: PROCESSING ARCHITECTURES AND INSTURCTION PROCESSING (E.G., PROCESSORS)

220  DF  PROCESSING CONTROL {12}
233  DF  .~ Branching (e.g., delayed branch, loop control, branch predict, interrupt) {5}
244.~.~ Exeception processing (e.g., interrupts and traps)

DEFINITION

Classification: 712/244

Exception processing (e.g., interrupts and traps):

(under subclass 233) Subject matter including means or steps for handling asynchronous or unexpected changes in instruction data flow.

(1) Note. This subclass provides for details of the internal operation of a processor for responding to an interrupt by the processor. Subject matter directed to

queuing interrupts, prioritizing interrupts or signals in a digital data processing system is classified elsewhere.

(2) Note. Details of interrupt processing for the purposes of task management or multitasking are classified elsewhere.

SEE OR SEARCH THIS CLASS, SUBCLASS:

40, for an external sync or interrupt signal in a processing architecture having sequential program control.

SEE OR SEARCH CLASS

709, Electrical Computers and Digital Processing Systems: Multiple Computer or Process Coordinating, 8+, for task management and multitasking.

710, Electrical Computers and Digital Processing Systems: Input/Output,

260+, for interrupt queuing and prioritizing.