US PATENT SUBCLASS 712 / 241
.~.~ Loop execution

Current as of: June, 1999
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712 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: PROCESSING ARCHITECTURES AND INSTURCTION PROCESSING (E.G., PROCESSORS)

220  DF  PROCESSING CONTROL {12}
233  DF  .~ Branching (e.g., delayed branch, loop control, branch predict, interrupt) {5}
241.~.~ Loop execution

DEFINITION

Classification: 712/241

Loop execution:

(under subclass 233) Subject matter including means or steps for controlling an execution of a program loop.

(1) Note. This subclass provides for details of an internal control of a processor and sequencing of instruction data for a performance of loops. Programming of loops and compiling of loop statements are classified elsewhere.

(2) Note. Subroutine calling and returning is classified elsewhere.

(3) Note. Interrupt service and return is classified elsewhere.

SEE OR SEARCH THIS CLASS, SUBCLASS:

242, for macroinstruction routine.

243, for microinstruction subroutine. 244, for exception processing (interrupts and traps).

SEE OR SEARCH CLASS

395, Information Processing System Organization,

500, for emulation and simulation, per se., subclass 704 for program code execution analyzer, de-buggers, or monitor, subclass 705+ for compiler.

709, Electrical Computers and Digital Processing Systems: Multiple Computer or Process Coordinating,

1+, for task management and control related to process or job execution, and subclasses 3+ for process scheduling.

710, Electrical Computers and Digital Processing Systems: Input/Output,

260+, for interrupt service and interrupt return processing in a digital data processing system.