US PATENT SUBCLASS 712 / 238
.~.~.~.~ Branch target buffer

Current as of: June, 1999
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712 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: PROCESSING ARCHITECTURES AND INSTURCTION PROCESSING (E.G., PROCESSORS)

220  DF  PROCESSING CONTROL {12}
233  DF  .~ Branching (e.g., delayed branch, loop control, branch predict, interrupt) {5}
234  DF  .~.~ Conditional branching {4}
237  DF  .~.~.~ Prefetching a branch target (i.e., look ahead) {1}
238.~.~.~.~ Branch target buffer

DEFINITION

Classification: 712/238

Branch target buffer:

(under subclass 237) Subject matter including means or steps for memorizing or holding the last several branch target addresses so that if a branch is encountered again, the target address does not have to be recalculated.