US PATENT SUBCLASS 712 / 206
.~ Of multiple instructions simultaneously

Current as of: June, 1999
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712 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: PROCESSING ARCHITECTURES AND INSTURCTION PROCESSING (E.G., PROCESSORS)

205  DF  INSTRUCTION FETCHING {2}
206.~ Of multiple instructions simultaneously

DEFINITION

Classification: 712/206

Of multiple instructions simultaneously:

(under subclass 205) Subject matter for causing a fetch of a plurality of instruction data to occur at the same time.