US PATENT SUBCLASS 438 / 672
.~.~.~ Plug formation (i.e., in viahole)


Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

584  DF  COATING WITH ELECTRICALLY OR THERMALLY CONDUCTIVE MATERIAL {2}
597  DF  .~ To form ohmic contact to semiconductive material {24}
669  DF  .~.~ And patterning of conductive layer {4}
672.~.~.~ Plug formation (i.e., in viahole)


DEFINITION

Classification: 438/672

Plug formation (i.e., in viahole):

(under subclass 669) Processes wherein the patterning step results in the remaining conductive material being recessed below the top surface of the substrate.