US PATENT SUBCLASS 438 / 405
.~.~ And separate partially isolated semiconductor regions


Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

400  DF  FORMATION OF ELECTRICALLY ISOLATED LATERAL SEMICONDUCTIVE STRUCTURE {10}
404  DF  .~ Total dielectric isolation {7}
405.~.~ And separate partially isolated semiconductor regions


DEFINITION

Classification: 438/405

And separate partially isolated semiconductor regions:

(under subclass 404) Process for making a total dielectric isolation semiconductor structure additionally having laterally spaced semiconductor regions at least one of which is fully electrically isolated from other laterally spaced semiconductive regions and at least one other region which is partially electrically isolated from another laterally spaced semiconductive region.