US PATENT SUBCLASS 438 / 196
.~.~ Including isolation structure

Current as of: June, 1999
Click HD for Main Headings
Click for All Classes

Internet Version by PATENTEC © 1999      Terms of Use


438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
186  DF  .~ Having junction gate (e.g., JFET, SIT, etc.) {9}
196.~.~ Including isolation structure

DEFINITION

Classification: 438/196

Including isolation structure:

(under subclass 186) Process for making a junction gate field effect transistor having a structure which serves to at least partially electrically isolate the semiconductor region in which the device is formed from laterally adjacent semiconductive regions.