US PATENT SUBCLASS 438 / 193
.~.~.~ Multiple parallel current paths (e.g., grid gate, etc.)

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
186  DF  .~ Having junction gate (e.g., JFET, SIT, etc.) {9}
192  DF  .~.~ Vertical channel {1}
193.~.~.~ Multiple parallel current paths (e.g., grid gate, etc.)

DEFINITION

Classification: 438/193

Multiple parallel current paths (e.g., grid gate, etc.):

(under subclass 192) Process for making a junction gate field effect transistor wherein the junction gate which controls the vertical channel consists of a plurality of parallel current paths.