US PATENT SUBCLASS 326 / 83
.~.~ Field-effect transistor

Current as of: June, 1999
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326 /   HD   ELECTRONIC DIGITAL LOGIC CIRCUITRY

62  DF  INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT, ETC.) {3}
82  DF  .~ Current driving (e.g., fan in/out, off chip driving, etc.) {2}
83.~.~ Field-effect transistor {4}
84  DF  .~.~.~> Bi-CMOS {1}
86  DF  .~.~.~> Bus driving
87  DF  .~.~.~> Having plural output pull-up or pull-down transistors
88  DF  .~.~.~> With capacitive or inductive bootstrapping

DEFINITION

Classification: 326/83

Field-effect transistor:

(under subclass 82) Subject matter wherein the current driving circuit includes a unipolar transistor in which current carriers are injected at a source terminal and pass to a drain terminal through a channel of semiconductor material whose conductivity depends largely on an electrical field applied to the semiconductor from a control electrode (gate).

(1) Note. In a unipolar transistor, the source to drain current involves only one type of charge carrier (i.e., holes in a p-type channel and electrons in an n-type channel).

(2) Note. Two types of FET structures are prevalent: (a) an all-junction device, known as a junction FET or JFET characterized by having heavily doped impurity regions of one type (e.g., p-type material), known as gate regions, on both sides of a second type semiconductor bar (e.g., n+ type material, etc.) to form a pn junction and (b) a device such as a MOSFET/IGFET, consisting of a lightly doped substrate (e.g., p-type material, etc.) into which two highly doped regions (e.g., n+ type material, etc.) are diffused for forming source/drain regions with the area therebetween becoming the channel for current carriers (i.e., holes or electrons) and with a layer of insulating material (e.g., SiO2) grown over the channel surface for separating the channel from a control (i.e., gate) electrode.