US PATENT SUBCLASS 326 / 21
SIGNAL SENSITIVITY OR TRANSMISSION INTEGRITY

Current as of: June, 1999
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326 /   HD   ELECTRONIC DIGITAL LOGIC CIRCUITRY

21SIGNAL SENSITIVITY OR TRANSMISSION INTEGRITY {5}
22  DF  .~> Input noise margin enhancement {1}
26  DF  .~> Output switching noise reduction {1}
29  DF  .~> Pulse shaping (e.g., squaring, etc.)
30  DF  .~> Bus or line termination (e.g., clamping, impedance matching, etc.)
31  DF  .~> Signal level or switching threshold stabilization {3}

DEFINITION

Classification: 326/21

SIGNAL SENSITIVITY OR TRANSMISSION INTEGRITY:

(under the class definition) Subject matter including a device to improve the reception of input signals at the logic circuit, or a device to maintain without distortion the logic signals produced at either (a) an output for coupling or interfacing to another stage or stages or (b) an intermediate location of the logic circuit to preclude signal or

transmission deterioration (e.g., by power dissipation or by reflection, etc.).

SEE OR SEARCH CLASS

327, Miscellaneous Active Electrical Nonlinear Devices, Circuits, and Systems,

379+, for signal transmission integrity or spurious noise override in a switching circuit.