US PATENT SUBCLASS 326 / 114-- .~.~ Wired logic (e.g., wired-OR, wired-AND, dotted logic, etc.)

US PATENT SUBCLASS 326 / 114
.~.~ Wired logic (e.g., wired-OR, wired-AND, dotted logic, etc.)

Current as of: June, 1999
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326 /	HD	ELECTRONIC DIGITAL LOGIC CIRCUITRY

104	DF	FUNCTION OF AND, OR, NAND, NOR, or NOT {7}
112	DF	.~ Field-effect transistor (e.g., JFET, etc.) {7}
114		.~.~ Wired logic (e.g., wired-OR, wired-AND, dotted logic, etc.)

DEFINITION

Classification: 326/114

Wired logic (e.g., wired-OR, wired-AND, dotted logic, etc.)

(under subclass 112) Subject matter which includes a logic family having their output gates eliminated simply by wiring the outputs of some basic logic circuits together, the resultant circuit is called wired-OR or wired-AND depending on the type of logic, and the joint output is in turn input to other logic gates for performing additional logic functions.

(1) Note. Wired logic is used in source-coupled logic where

source channel outputs are wired together. Special FET gates, such as open-drain gates, can be directly wired together.

(2) Note. Circuits implemented using wired logic save space by reducing devices in number, and increasing operational speed by eliminating some delays due to multiple level gating.