US PATENT SUBCLASS 712 / 230
.~ Generating next microinstruction address


Current as of: June, 1999
Click HD for Main Headings
Click for All Classes

Internet Version by PATENTEC © 1999      Terms of Use



712 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: PROCESSING ARCHITECTURES AND INSTURCTION PROCESSING (E.G., PROCESSORS)

220  DF  PROCESSING CONTROL {12}
230.~ Generating next microinstruction address


DEFINITION

Classification: 712/230

Generating next microinstruction address:

(under subclass 220) Subject matter including means or steps for generating an address of a next microinstruction in sequence to be processed.

(1) Note. This subclass provides for details of generating a next microinstruction address. Generation of a next microinstruction address is classified elsewhere. Similarly, generation of a next address for a data element, per se, is classified elsewhere.

SEE OR SEARCH THIS CLASS, SUBCLASS:

207, for prefetch of instruction data.

233+, for branching.

SEE OR SEARCH CLASS

711, Electrical Computers and Digital Processing Systems: Memory,

200+, for address formation.