This class provides, within a computer or digital data processing system, for subject matter represented by a particular arrangement that includes at least one of the following means: A) components of an individual complete processor, which may be formed on a single integrated circuit (IC); B) components of a complete digital data processing system; C) plural processors; or D) plural digital data processing systems; wherein the particular arrangement
further includes at least one of the following functions:
1) processing instruction data for specific processor architectures;
2) accessing or retrieving instruction data of a fixed or variable length from
3) locating and retrieving instruction data for processing;
4) determining via internal hardware, firmware or software operations the
5) dispatching instruction data for execution (e.g., designating a register
6) dynamically testing instruction data and operands to assess conflicts
7) dynamically controlling the execution, processing, or sequencing of II
(1) Note. Instruction data are defined in the glossary for this class to be data representative of an operation and identifying its operands, if any.
(2) Note. Process and apparatus for processing instruction data that are classified herein are predicated on a particular, identifiable architecture of a computer or digital data processing system that directs the nature of the processing. Multiple computer and process coordinating (e.g., task management, task control) is classified elsewhere. See SEE OR SEARCH CLASS notes below.
(3) Note. Register level transactions at the level of the arithmetic logic unit (ALU-level) or functional unit (FU-level) and logic for realizing such transactions are often a part of instruction processing, per se. General purpose, digital logic circuits, however, are classified elsewhere. See SEE OR SEARCH CLASS notes below.
(4) Note. Exceptions, interrupts, and traps classified herein recite the details of the internal operation of the hardware or the microcode of the processor with only nominal recitation of the stimulus resulting in the exception, interrupt or trap. Process and apparatus for queuing or scheduling interrupts or signals in a computer or digital data processing system are classified elsewhere. See SEE OR SEARCH CLASS notes below. Process and apparatus directed to reliability and testing utilizing halts, interrupts, and traps are also classified elsewhere. See SEE OR SEARCH CLASS notes below.
(5) Note. Virtual machine or virtual processor is classified elsewhere. See SEE OR SEARCH CLASS notes below.
(6) Note. Process and apparatus for dynamically aligning instruction data are classified herein. Process and apparatus for shifting memory spaces, such as, boundary alignment related to memory addressing and page mapping are classified elsewhere. See SEE OR SEARCH CLASS notes below. Compilers performing static alignment are classified elsewhere. See SEE OR SEARCH CLASS notes below. Process and apparatus for aligning for data entry or compacting in cache memory typically are classified elsewhere. See SEE OR SEARCH CLASS notes below.
(7) Note. Emulation for decoding instruction data for execution is classified herein; however, emulation of system component for compatibility is classified elsewhere. See SEE OR SEARCH CLASS notes below. Emulation directed to testingis also classified elsewhere. See SEE OR SEARCH CLASS notes below.
(8) Note. Process and apparatus for locating and retrieving instruction data in direct support of an instruction pipeline are classified herein; however, process and apparatus for accessing and controlling memory at other higher levels (e.g., cache memory, disk memory, and shared memory) are classified elsewhere. See SEE OR SEARCH CLASS notes below.
(9) Note. Process and apparatus nominally reciting addressing schemes and address data generation may be classified herein; however, process and apparatus for generalized address forming, addressing operands, generating addresses in response to microinstructions, and addressing in combination with particular memory systems are classified elsewhere. See SEE OR SEARCH CLASS notes below.
(10) Note. Process and apparatus for decoding instruction data to determine their meaning for subsequent execution or decision making are classified herein; however, generic decoding circuits, methods, and programs are classified elsewhere. See SEE OR SEARCH CLASS notes below. (11) Note. Process and apparatus for issuing or dispatching of instruction data to hardware elements internal to a processor for decoding or executing are classified herein; however, process and apparatus for dispatching in the field of process control for task management dealing with process scheduling, load balancing, etc., are classified elsewhere. See SEE OR SEARCH CLASS notes below.
(12) Note. Process and apparatus for dynamically controlling the issuance or execution of instruction data based on analysis of hardware-resource availability, hardware-resource utilization, and data dependency are classified herein; however, processes and apparatus for task resource management are classified elsewhere. See SEE OR SEARCH CLASS notes below. Dependency checking performed by acompiler is classified elsewhere. See SEE OR SEARCH CLASS notes below. Process and apparatus for enhancing the
reliability and availability of functional units that include determining a fault condition are classified elsewhere. See SEE OR SEARCH CLASS notes below.
(13) Note. Process and apparatus for dealing with resource management problems within a stream of instruction data, generally at the ALU/functional-unit level are classified herein; however, process and apparatus for resource management in a manufacturing environment are classified elsewhere. See the SEE OR SEARCH CLASS notes below.
(14) Note. Process and apparatus for reserving the use of functional units at the instruction level of a computer or digital data processing system are classified herein; however, processes and apparatus for reserving seats for travel, entertainment, etc. are classified elsewhere. See SEE OR SEARCH CLASS notes below.
(15) Note. Process and apparatus utilizing hardware or microcode for processing and executing instruction data are classified herein; however, instruction processing being performed by a compiler, by an interpreter, or by an operating system is classified elsewhere. See SEE OR SEARCH CLASS notes below. Process and apparatus for high-level processing of input/output commands are classified elsewhere. See SEE OR SEARCH CLASS notes below. Process and apparatus for the sequencing common in computerized numerical controllers (CNC), industrial controllers, computer driven machining, etc., is classified elsewhere. See SEE OR SEARCH CLASS notes below.
(16) Note. Hardwired sequencers are also often referred to as sequential state machines in the art. They are appropriately classified herein when they are performing control or sequencing of instruction data within a processor.
(17) Note. Process and apparatus for graphic command processing are classified elsewhere. See SEE OR SEARCH CLASS notes below.
III
SEE OR SEARCH CLASS
326, Electronic Digital Logic Circuitry, appropriate subclasses for generic digital logic devices, circuitry, and subcombinations thereof, wherein nonarithmetical operations are performed upon discrete electrical signals representing a value normally described by numerical digits, particularly
37+, for programmable circuits such as Programmable Logic Arrays (PLA) and subclasses 105+ for decoding circuitry. 340, Communications: Electrical,
825+, for controlling one or more devices to obtain a
plurality of results by transmission of a designated one of plural distinctive control signals over a smaller number of communication lines or channels, particularly subclass 825.02 for tree or cascade selective communication, subclasses 825.03+ for channel selection, subclass 825.05 for a plurality of controlled devices connected by a communication line in a closed series configuration, 825.06+ for communication systems where status of a controlled device is communicated, subclasses 825.2+ for synchronizing selective communication systems, subclasses 825.5+ for lockout or priority in selective communication systems, subclasses 825.52+ for addressing in selective communication system, and subclasses 825.57+ for pulse responsive actuation in selective communication system.
502+, for a computer graphic processor system which includes plural graphics processors, subclass 522 for graphic command processing
364, Electrical Computers And Data Processing System,
130+, for data processing control system, subclasses 400+ for specific application.
370, Multiplex Communications, appropriate subclasses for the simultaneous transmission of two or more signals over a common medium, particularly
254+, for network configuration determination, subclasses 351+ for path finding or routing including packet switching, circuit switching, ATM switching, and subclasses 465+ for adaptive communication protocol.
377, Electrical Pulse Counters, Pulse Dividers, and Shift Registers: Circuits and Systems, various subclasses for generic circuits for pulse counting.
380, Cryptography,
3+, for stored information access or copy prevention (e.g., software program protection or computer virus detection) in combination with data encryption, subclasses 23+ for electrical signal modification (e.g., scrambling) with user or record actuated authentication in an electronic fund transfer or in a computer, subclass 48 for electronic signal modification with synchronization, subclasses 49+ electronic signal modification with digital signal handling (e.g., digital control, digital computer communication). 381, Electrical Audio Signal Processing Systems and Devices, various subclasses for wired one-way audio systems, per se.
395, Information Processing System Organization,
500, for simulation or emulation of computer components, subclass 395/527 for emulation of system components for compatibility, subclasses 395/701+ for a software development tool, particularly, subclasses 395/705+ for compilers and compiler-related dependency checking.
701, Data Processing: Vehicles, Navigation, and Relative Location,
1+, for vehicle control, guidance, operation, or indication, subclasses 200+ for navigation, and subclasses 300+ for relative location determination.
702, Data Processing: Measuring, Calibrating or Testing, appropriate subclasses for testing measuring or calibrating, particularly
186, for computer and peripheral benchmarking.
704, Data Processing: Speech Signal Processing, Linguistics, Language Translation, and Audio Compression/ Decompression,
1+, for linguistics; subclasses 200+ for speech audio processing, subclasses 500 through 504 for audio signal time or bandwidth compression or expansion.
705, Data Processing: Financial, Business Practice, Management, or Cost/Price Determination, particularly
5+, for reservation, check-in, and booking for reserving space and subclasses 8+ for scheduling and allocating resources for administrative functions. 706, Data Processing: Artificial Intelligence,
1+, for fuzzy logic hardware; subclass 10 for plural processing intelligence systems, subclass 11 for artificial intelligence system having particular user interface; subclasses 12+ for machine learning system, subclass 14 for adaptive system; subclasses 15+ for neural network; and subclasses 45+ for knowledge processing system.
707, Data Processing: Data Base and File Management, Data Structures, or Document Processing, particularly
1+, database or file accessing, subclasses 100+ for database scheme or structure, subclasses 200+ for file or database management, and subclasses 500+ for document processing.
708, Electrical Computers: Arithmetic Processing and Calculating,
1+, for electrical hybrid calculating computer, subclasses 100+ for electrical digital calculating computer, and subclasses 800+ for electrical analog calculating computer.
709, Electrical Computers and Digital Processing Systems: Multiple Computer and Process Coordinating;
1+, for task management or task control, particularly subclass 7 for dependency checking amongst processes and tasks and subclasses 200+ for transferring data between plural, spatially distributed computers or digital data processing systems.
710, Electrical Computers and Digital Processing Systems: Input/Output, appropriate subclasses for interconnecting or transferring data among processors, memories, and peripherals for of computers or digital data processing systems particularly
260+, for interrupt processing.
711, Electrical Computers and Digital Processing Systems: Memory, 1+, for addressing in combination with particular memory systems; particularly subclass 2 for addressing extended or expanded memory; subclass 5 for addressing multiple memory modules; subclasses 101+ for accessing and control of specific memory compositions; subclasses 118+ for cache memory; subclasses 147+ for shared memory access and control; subclass 159 for memory entry replacement strategies; subclass 201 for address generation directed to slip control, misalignment, and boundary alignment; subclass 209 for page address generation processing; and subclass 212 for address generation by varying bit-length or size; subclass 214 for operand address generation; and subclass 215 for address formation in response to a microinstruction;
713, Electrical Computers And Digital Processing Systems,
1+, for computer initialization or configuration, subclasses 100 for reconfiguration, subclasses 200+ for security, subclasses 300+ for computer power control, and subclasses 400-601 for synchronization or clock control in a digital data processing.
714, Electrical Computers and Digital Processing Systems: Error Detection/ Correction and Fault Detection /Recovery, particularly
707, for synchronization control using an error rate; subclass 731 for a reference timing function or a clock pulse generator in a scan path testing system; subclass 744 for clock or synchronization in digital logic testing using a test pattern generator; and subclass 798 for error detection for synchronization control.
IV GLOSSARY:
BUS
A conductor used for transferring data, signals, or power.
COMPUTER
A machine that inputs data, processes data, stores data, and outputs data.
DATA Representation of information in a coded manner suitable for communication, interpretation, or processing.
Address data-Data that represent or identify a source or destination.
Instruction data-Data that represent an operation and identify its operands, if any.
Status data-Data that represent conditions of data, digital data processing systems, computers, peripherals, memory, etc.
User data-Data other than address data, instruction data, or status data.
DATA PROCESSING
See PROCESSING, below.
DIGITAL DATA PROCESSING SYSTEM
An arrangement of processor(s) in combination with either memory or peripherals, or both, performing data processing.
ERROR
Manifestation of a fault as an undesired event that occurs when actual behavior deviates from the behavior that is required by initial specifications.
FAILURE Manifestation of an error as a nonperformance of an expected system service as required by the initial specifications.
FAULT
A flaw in a functional unit (hardware or software).
INFORMATION
Meaning that a human being assigns to data by means of the conventions applied to that data.
MEMORY
A functional unit to which data can be stored and from which
data can be retrieved.
PERIPHERAL
A functional unit that transmits data to or receives data from a computer to which it is coupled.
PROCESSING
Methods or apparatus performing systematic operations upon data or information exemplified by functions such as data or information transferring, merging, sorting, and computing (i.e., arithmetic operations or logical operations). (1) Note.In this class, the glossary term data is used to modify processing in the term data processing; whereas the term digital data processing system refers to a machine performing data processing.
(2) Note.In an effort to avoid redundant constructions, in this class, where appropriate, the term address data processing is used in place of address data data processing.
PROCESSOR
A functional unit that interprets and executes instruction data.
RECOVERY
Responding to a fault in a system by either returning a system to a previous level of correct operation, achieving a degraded level of correct operation, or safely shutting down the system.
SECURITY
Extent of protection for system hardware, software, or data from maliciously caused destruction, unauthorized modification, or unauthorized disclosure.