US PATENT SUBCLASS 710 / 117
.~.~.~ Time-slotted bus accessing

Current as of: June, 1999
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710 /   HD   ELECTRICAL COMPUTERS AND DIGITAL DATA PROCESSING SYSTEMS: INPUT/OUTPUT

100  DF  INTRASYSTEM CONNECTION (E.G., BUS AND BUS TRANSACTION PROCESSING) {7}
107  DF  .~ Bus access regulation {7}
113  DF  .~.~ Centralized bus arbitration {4}
117.~.~.~ Time-slotted bus accessing

DEFINITION

Classification: 710/117

Time-slotted bus accessing:

(under subclass 113) Subject matter including means or steps for granting the contending digital data processing system components use of the shared bus for a predetermined time period.

SEE OR SEARCH THIS CLASS, SUBCLASS:

124, for decentralized time-slotted bus accessing.