US PATENT SUBCLASS 710 / 100
INTRASYSTEM CONNECTION (E.G., BUS AND BUS TRANSACTION PROCESSING)

Current as of: June, 1999
Click HD for Main Headings
Click for All Classes

Internet Version by PATENTEC © 1999      Terms of Use


710 /   HD   ELECTRICAL COMPUTERS AND DIGITAL DATA PROCESSING SYSTEMS: INPUT/OUTPUT

100INTRASYSTEM CONNECTION (E.G., BUS AND BUS TRANSACTION PROCESSING) {7}
101  DF  .~> Bus expansion or extension {1}
104  DF  .~> System configuring
105  DF  .~> Protocol {1}
107  DF  .~> Bus access regulation {7}
126  DF  .~> Bus architecture {2}
129  DF  .~> Interface architecture {1}
131  DF  .~> Switching (i.e., intrasystem connection path selecting) {1}

DEFINITION

Classification: 710/100

INTRASYSTEM CONNECTING (E.G., BUS AND BUS TRANSACTION PROCESSING):

(under the class definition) Subject matter comprising means or steps for interconnecting or communicating between two or more components connected to an interconnection medium (e.g., a bus) within a single computer or digital data processing system.

(1) Note. This subclass is for processes and apparatus for interfacing only compatible components; components that can communicate data without any format changes or translation are classified in this subclass. Processes and apparatus for interfacing peripherals with incompatible computers or digital data processing systems are classified elsewhere. Processes and apparatus for interfacing other incompatible components of computers or digital data processing systems are classified elsewhere. See the SEE OR SEARCH CLASS notes below.

(2) Note. This subclass requires more than nominal recitation of intrasystem connections and communication. For example, processing architecture art areas, including virtual processors, MIMD, vector and array processors, and single-chip microprocessors which only nominally include recitation of intrasystem connections and communication are classified elsewhere. See the SEE OR SEARCH CLASS notes below.

SEE OR SEARCH THIS CLASS, SUBCLASS:

62+, for making peripherals compatible with computers or digital data processing systems.

SEE OR SEARCH CLASS

326, Electronic Digital Logic Circuitry, 30, for bus or line terminating circuitry, and subclasses 62+ for generic digital logic gate level interface circuitry.

340, Communications: Electrical,

825+, for controlling one or more devices to obtain a plurality of results by transmission of a designated one of plural distinctive control signals over a smaller number of communication lines or channels, particularly subclass 825.02 for tree or cascade selective communication, subclasses 825.03+ for channel selection, subclass 825.05 for a plurality of controlled devices connected by a communication line in a closed series configuration, 825.06+ for communication systems where status of a controlled device is communicated, subclasses 825.2+ for synchronizing selective communication systems, subclasses 825.5+ for lockout or priority in selective communication systems, subclasses 825.52+ for addressing in selective communication systems, and subclasses 825.57+ for pulse responsive actuation in selective communication systems.

370, Multiplex Communications, appropriate subclasses for the simultaneous transmission of two or more signals over a common medium.

395, Information Processing System Organization,

500.44+, for compatibility, simulation, or emulation of system components for interfacing between incompatible components of computers or digital data processing systems.

712, Electrical Computers and Digital Data Processing Systems: Processing Architectures and Instruction Processing (e.g. processors), appropriate subclasses for processing architecture art areas, including virtual processors, MIMD, vector and array processors, and single-chip microprocessors which nominally include recitation of intrasystem connections and communication.