US PATENT SUBCLASS 710 / 126
.~ Bus architecture

Current as of: June, 1999
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710 /   HD   ELECTRICAL COMPUTERS AND DIGITAL DATA PROCESSING SYSTEMS: INPUT/OUTPUT

100  DF  INTRASYSTEM CONNECTION (E.G., BUS AND BUS TRANSACTION PROCESSING) {7}
126.~ Bus architecture {2}
127  DF  .~.~> Buses having variable widths
128  DF  .~.~> Dual bus system

DEFINITION

Classification: 710/126

Bus architecture:

(under subclass 100) Subject matter including means or steps for providing structural interconnection for data transfer between buses.