US PATENT SUBCLASS 438 / FOR 221
.~ Including isolation step (437/61)

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

FOR 149  DF  INCLUDING FORMING A SEMICONDUCTOR JUNCTION (437/15) {7}
FOR 221.~ Including isolation step (437/61) {4}
FOR 222  DF  .~.~> By forming total dielectric isolation (437/62)
FOR 223  DF  .~.~> By forming vertical isolation combining dielectric and PN junction (437/63)
FOR 224  DF  .~.~> Using vertical dielectric (air-gap/insulator) and horizontal PN junction (437/64) {3}
FOR 234  DF  .~.~> Isolation by PN junction only (437/74) {4}

DEFINITION

Classification: 438/FOR.221

Including isolation step:

Foreign art collection for processes for separating devices or regions by providing means whereby electron flow will not be possible between such devices or regions, e.g., dielectric area, air-gap, intrinsic zone by counter doping, reversed biased PN junction or combinations thereof.