US PATENT SUBCLASS 438 / 128
MAKING DEVICE ARRAY AND SELECTIVELY INTERCONNECTING

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

128MAKING DEVICE ARRAY AND SELECTIVELY INTERCONNECTING {4}
129  DF  .~> With electrical circuit layout
130  DF  .~> Rendering selected devices operable or inoperable
131  DF  .~> Using structure alterable to conductive state (i.e., antifuse)
132  DF  .~> Using structure alterable to nonconductive state (i.e., fuse)

DEFINITION

Classification: 438/128

MAKING DEVICE ARRAY AND SELECTIVELY INTERCONNECTING:

(under the class definition) Process for forming an array of active devices on a semiconductor substrate and electrically interconnecting the devices into a designated circuit arrangement.

(1) Note. The processes found in this and its indented subclasses result in circuits which are alter-natively referred to as personalized, customized, or application specific.

(2) Note. This and its indented subclasses do not take processes of producing a shorted or shunted structure as an integral part of a single device.

SEE OR SEARCH THIS CLASS, SUBCLASS:

6, for processes of interconnecting plural devices wherein at least one operation is responsive to a sensed condition.

587, for process of forming an array of gate electrodes upon a semiconductor substrate.

598+, for a process of metallizing a semiconductor substrate wherein the electrically conductive metallization contains a portion which is alterable from the conductive to nonconductive condition or vice-versa (e.g., a fuse or antifuse).

SEE OR SEARCH CLASS 257, Active Solid-State Devices (e.g., Transistors, Solid-State Diodes), particularly

202+, for gate arrays.